Somayyeh Maabi; Seyed-Hosein Attarzadeh-Niaki; Maghsoud Abbaspour
Abstract
With growing adoption of Internet of Things (IoT) technologies, the number of connected devices and the complexity of its applications increase. Therefore, novel concepts such as edge ...
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With growing adoption of Internet of Things (IoT) technologies, the number of connected devices and the complexity of its applications increase. Therefore, novel concepts such as edge and fog computing are suggested to introduce processing, connectivity and storage capabilities between devices and the cloud to overcome the challenge of handling large amounts of data. However, these layers introduce new challenges in their design, especially in the architecture and micro-architecture levels. In this article, a systematic NISC-based (No Instruction Set Computer) micro-architecture design methodology, NIMA, is presented to rapidly and optimally customize a processor architecture for an application domain of interest, based on a representative benchmark. A new utilization metric and a supporting heuristic algorithm are proposed to help with optimizing the processor data-path. We apply our methodology to design optimal processors based on the performance, area or power design objectives for a proposed benchmark in the fog computing domain. Experimental evidence shows the improvement of desired objectives in different scenarios compared to a conventional MIPS-based processor.
